Bugs fixes in "intel-microcode"
| Origin | Bug number | Title | Date fixed |
|---|---|---|---|
| CVE | CVE-2025-24495 | Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user to potent | 2025-05-27 |
| CVE | CVE-2025-20012 | Incorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via | 2025-05-27 |
| CVE | CVE-2025-20623 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Core™ pro | 2025-05-27 |
| CVE | CVE-2024-45332 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch pred | 2025-05-27 |
| CVE | CVE-2024-43420 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom(R) proc | 2025-05-27 |
| CVE | CVE-2025-20103 | Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial | 2025-05-27 |
| CVE | CVE-2025-20054 | Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of serv | 2025-05-27 |
| CVE | CVE-2024-28956 | Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authen | 2025-05-27 |
| CVE | CVE-2025-24495 | Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user to potent | 2025-05-27 |
| CVE | CVE-2025-20012 | Incorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via | 2025-05-27 |
| CVE | CVE-2025-20623 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Core™ pro | 2025-05-27 |
| CVE | CVE-2024-45332 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch pred | 2025-05-27 |
| CVE | CVE-2024-43420 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel Atom(R) proc | 2025-05-27 |
| CVE | CVE-2025-20103 | Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial | 2025-05-27 |
| CVE | CVE-2025-20054 | Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable denial of serv | 2025-05-27 |
| CVE | CVE-2024-28956 | Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some Intel(R) Processors may allow an authen | 2025-05-27 |
| CVE | CVE-2025-24495 | Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user to potent | 2025-05-27 |
| CVE | CVE-2025-20012 | Incorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via | 2025-05-27 |
| CVE | CVE-2025-20623 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Core™ pro | 2025-05-27 |
| CVE | CVE-2024-45332 | Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch pred | 2025-05-27 |
About
-
Send Feedback to @ubuntu_updates
